Electronics and Communication Engineering
DLD with Verilog Virtual Laboratory
Experiments
Aim
Theory
Objective
Procedure
Pretest
Simulation
Assignment
Posttest
References
Contributors
Feedback
Aim
Theory
Objective
Procedure
Pretest
Simulation
Assignment
Posttest
References
Contributors
Feedback
Design of ALU using Verilog
Design the ALU circuit with more select lines and more operations like subtract, right shift, left shift etc